Date: October 27, 2026 | Time: 14:00 - 17:00
Shenzhen University, China
Talk Title: Smart and Secure CMOS Image Sensing SoCs Featuring Sensor-AI and Sensor-PUF Co-Designed Architectures
Bio.: Xiaojin Zhao is a Distinguished Professor of Shenzhen University, affiliated with the State Key Laboratory of Radio Frequency Heterogeneous Integration. He received dual B.Sc. degrees in microelectronics and applied mathematics from Peking University in 2005, and his Ph.D. in electrical and electronic engineering from the Hong Kong University of Science and Technology (HKUST) in 2010. He was a Postdoctoral Research Associate at HKUST and a Visiting Scholar at IMEC, Belgium. His research focuses on CMOS/MEMS monolithic image sensors, gas sensors, and trustworthy sensing technologies based on PUFs and TRNGs. He has published 120 international journal and conference papers. He is an IEEE Senior Member, Associate Editor of IEEE Sensors Journal, and technical committee member of IEEE CASS.
Shenzhen University, China
Talk Title: Smart Flow Sensing SoCs based on Monolithic Integration and MEMS-IC Co-design
Bio.: Wei Xu is a Tenured Associate Professor, Distinguished Research Fellow, and Ph.D. Supervisor. He is a recipient of the Guangdong Provincial Excellent Young Scientist Award and Shenzhen Overseas High-Level Talent, a Senior Member of IEEE, a member of the IEEE CASS Sensor Systems Technical Committee, an Associate Editor of IEEE Sensors Journal, and a Visiting Scholar at BSAC, UC Berkeley in 2024. He received his B.Eng. and M.Eng. degrees from Huazhong University of Science and Technology in 2010 and 2013, and his Ph.D. from Hong Kong University of Science and Technology in 2017. His research focuses on CMOS-MEMS sensing chips and microsystem integration.
Smart sensing system-on-chips (SoCs) are becoming a critical hardware foundation for edge intelligence, secure perception, Internet of Things, healthcare monitoring, aerospace systems, and industrial sensing. As sensing terminals move closer to the physical world, they are expected not only to acquire signals, but also to extract features, perform intelligent recognition, support secure authentication, and make energy-efficient decisions. This trend is driving the evolution from conventional sensor chips toward highly integrated smart sensing SoCs that combine advanced sensing front ends, low-noise circuits, embedded computing, AI acceleration, heterogeneous integration, and hardware security. This tutorial will present recent advances in smart sensing SoCs from two complementary perspectives: sensor-AI co-designed image sensing architectures and heterogeneous CMOS-MEMS integrated sensing systems. The first part focuses on intelligent CMOS image sensing SoCs integrating in-sensor computing, event-driven acquisition, edge-AI processing, and hardware-level security. The second part discusses CMOS-MEMS sensing SoCs, emphasizing MEMS-ASIC co-design, post-CMOS fabrication, thermal sensing principles, cross-domain noise optimization, and practical applications.
The tutorial will first introduce image sensing SoCs inspired by biological vision. Dynamic vision sensors, also known as event-based vision sensors, have attracted increasing attention due to their sparse data representation, high temporal resolution, low latency, wide dynamic range, and high energy efficiency. Unlike conventional frame-based sensors, DVS pixels generate asynchronous events only when local intensity changes occur, reducing redundant data transmission and computation. However, existing DVS chips often discard static spatial information that is also important for robust visual recognition and decision-making. To address this limitation, a global-shutter-based dual-mode hybrid image sensing SoC with in-pixel adaptive conversion gain will be presented. This architecture combines active pixel sensor imaging and dynamic vision sensing to acquire both static and dynamic scene information efficiently. The tutorial will further discuss end-to-end sensor-AI co-design. In conventional edge vision systems, CMOS image sensors and AI processors are often designed separately, causing excessive data movement, interface overhead, and algorithm-hardware mismatch. A representative image sensing SoC with an integrated highly energy-efficient edge convolutional neural network processor will be introduced, highlighting joint optimization of the sensing front end, data representation, neural network model, and hardware accelerator. In addition, hardware-level security for trustworthy imaging will be addressed through an in-sensor hardware security architecture based on an optically reconfigurable physical unclonable function, which provides a sensor-level root of trust against emerging spoofing and synthetic-content attacks.
The second part of this tutorial will focus on heterogeneous CMOS-MEMS integrated sensing SoCs. MEMS, or micro-electromechanical systems, enables sensors with miniaturized form factors, low power consumption, and high sensitivity. When integrated with CMOS technology, these sensors can further benefit from compact system architecture, reduced parasitic effects, improved signal integrity, and high signal-to-noise ratio. However, the development of high-performance CMOS-MEMS sensing SoCs still faces several key challenges, including MEMS-ASIC co-design, thermal isolation, CMOS-compatible post-processing, and cross-domain noise optimization. In this tutorial, a system-level modeling framework for the cooperative design of CMOS-MEMS thermal flow sensing SoCs will first be introduced. Post-CMOS processing strategies for MEMS structure thinning, thermal isolation enhancement, and sensor performance improvement will then be discussed. Representative thermal flow, acceleration, and pressure sensing SoCs will be presented, with emphasis on jointly analyzing and optimizing mechanical-domain and electrical-domain noise to improve signal-to-noise ratio and limit of detection. Finally, application examples in smart building airflow monitoring, respiration sensing, and IC thermal characterization will be introduced.
Overall, this tutorial will provide attendees with a comprehensive view of smart sensing SoCs by bridging system-level sensor design, sensor-AI co-design, hardware security, heterogeneous CMOS-MEMS integration, and practical sensing applications.